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Intel SSE MMX2 KNI documentation AMD 64 Bit & Opteron resource on this site Intel Itanium 64 Bit processor Intel 80386 Reference Programmer's Manual Our Partners: |
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Chapter 17 -- 80386 Instruction Set prev: IDIV Signed Divide next: IN Input from Port
IMUL -- Signed Multiply
Opcode Instruction Clocks Description
F6 /5 IMUL r/m8 9-14/12-17 AX= AL * r/m byte
F7 /5 IMUL r/m16 9-22/12-25 DX:AX := AX * r/m word
F7 /5 IMUL r/m32 9-38/12-41 EDX:EAX := EAX * r/m dword
0F AF /r IMUL r16,r/m16 9-22/12-25 word register := word
register * r/m word
0F AF /r IMUL r32,r/m32 9-38/12-41 dword register := dword
register * r/m dword
6B /r ib IMUL r16,r/m16,imm8 9-14/12-17 word register := r/m16 *
sign-extended immediate byte
6B /r ib IMUL r32,r/m32,imm8 9-14/12-17 dword register := r/m32 *
sign-extended immediate byte
6B /r ib IMUL r16,imm8 9-14/12-17 word register := word
register * sign-extended
immediate byte
6B /r ib IMUL r32,imm8 9-14/12-17 dword register := dword
register * sign-extended
immediate byte
69 /r iw IMUL r16,r/m16,imm16 9-22/12-25 word register := r/m16 *
immediate word
69 /r id IMUL r32,r/m32,imm32 9-38/12-41 dword register := r/m32 *
immediate dword
69 /r iw IMUL r16,imm16 9-22/12-25 word register := r/m16 *
immediate word
69 /r id IMUL r32,imm32 9-38/12-41 dword register := r/m32 *
immediate dword
NotesThe 80386 uses an early-out multiply algorithm. The actual number of clocks depends on the position of the most significant bit in the optimizing multiplier, shown underlined above. The optimization occurs for positive and negative values. Because of the early-out algorithm, clock counts given are minimum to maximum. To calculate the actual clocks, use the following formula:
Actual clock = if m <> 0 then max(ceiling(log{2}(m)), 3) + 6 clocks
Actual clock = if m = 0 then 9 clocks
(where m is the multiplier)
Add three clocks if the multiplier is a memory operand.
Operationresult := multiplicand * multiplier; DescriptionIMUL performs signed multiplication. Some forms of the instruction use implicit register operands. The operand combinations for all forms of the instruction are shown in the "Description" column above.IMUL clears the overflow and carry flags under the following conditions: Instruction Form Condition for Clearing CF and OF r/m8 AL := sign-extend of AL to 16 bits r/m16 AX := sign-extend of AX to 32 bits r/m32 EDX:EAX := sign-extend of EAX to 32 bits r16,r/m16 Result exactly fits within r16 r/32,r/m32 Result exactly fits within r32 r16,r/m16,imm16 Result exactly fits within r16 r32,r/m32,imm32 Result exactly fits within r32 Flags AffectedOF and CF as described above; SF, ZF, AF, and PF are undefinedProtected Mode Exceptions#GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page faultReal Address Mode ExceptionsInterrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFHVirtual 8086 Mode ExceptionsSame exeptions as in Real Address Mode; #PF(fault-code) for a page faultNotesWhen using the accumulator forms (IMUL r/m8, IMUL r/m16, or IMUL r/m32), the result of the multiplication is available even if the overflow flag is set because the result is two times the size of the multiplicand and multiplier. This is large enough to handle any possible result.
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Chapter 17 -- 80386 Instruction Set |