Intel and compatable CPU's Programming Information
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SMSW -- Store Machine Status Word
Opcode Instruction Clocks Description 0F 01 /4 SMSW r/m16 2/3,pm=2/2 Store machine status word to EA word
r/m16 := MSW;
DescriptionSMSW stores the machine status word (part of CR0) in the two-byte register or memory location indicated by the effective address operand.
Protected Mode Exceptions#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
Real Address Mode ExceptionsInterrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
Virtual 8086 Mode ExceptionsSame exceptions as in Real Address Mode; #PF(fault-code) for a page fault
NotesThis instruction is provided for compatibility with the 80286; 80386 programs should use MOV ..., CR0.