Intel and compatable CPU's Programming Information
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STOS/STOSB/STOSW/STOSD -- Store String Data
Opcode Instruction Clocks Description AA STOS m8 4 Store AL in byte ES:[(E)DI], update (E)DI AB STOS m16 4 Store AX in word ES:[(E)DI], update (E)DI AB STOS m32 4 Store EAX in dword ES:[(E)DI], update (E)DI AA STOSB 4 Store AL in byte ES:[(E)DI], update (E)DI AB STOSW 4 Store AX in word ES:[(E)DI], update (E)DI AB STOSD 4 Store EAX in dword ES:[(E)DI], update (E)DI
IF AddressSize = 16 THEN use ES:DI for DestReg ELSE (* AddressSize = 32 *) use ES:EDI for DestReg; FI; IF byte type of instruction THEN (ES:DestReg) := AL; IF DF = 0 THEN DestReg := DestReg + 1; ELSE DestReg := DestReg - 1; FI; ELSE IF OperandSize = 16 THEN (ES:DestReg) := AX; IF DF = 0 THEN DestReg := DestReg + 2; ELSE DestReg := DestReg - 2; FI; ELSE (* OperandSize = 32 *) (ES:DestReg) := EAX; IF DF = 0 THEN DestReg := DestReg + 4; ELSE DestReg := DestReg - 4; FI; FI; FI;
DescriptionSTOS transfers the contents of all AL, AX, or EAX register to the memory byte or word given by the destination register relative to the ES segment. The destination register is DI for an address-size attribute of 16 bits or EDI for an address-size attribute of 32 bits.
The destination operand must be addressable from the ES register. A segment override is not possible.
The address of the destination is determined by the contents of the destination register, not by the explicit operand of STOS. This operand is used only to validate ES segment addressability and to determine the data type. Load the correct index value into the destination register before executing STOS.
After the transfer is made, DI is automatically updated. If the direction flag is 0 (CLD was executed), DI is incremented; if the direction flag is 1 (STD was executed), DI is decremented. DI is incremented or decremented by 1 if a byte is stored, by 2 if a word is stored, or by 4 if a doubleword is stored.
STOSB, STOSW, and STOSD are synonyms for the byte, word, and doubleword STOS instructions, that do not require an operand. They are simpler to use, but provide no type or segment checking.
Protected Mode Exceptions#GP(0) if the result is in a nonwritable segment; #GP(0) for an illegal memory operand effective address in the CS, DS, ES, FS, or GS segments; #SS(0) for an illegal address in the SS segment; #PF(fault-code) for a page fault
Real Address Mode ExceptionsInterrupt 13 if any part of the operand would lie outside of the effective address space from 0 to 0FFFFH
Virtual 8086 Mode ExceptionsSame exceptions as in Real Address Mode; #PF(fault-code) for a page fault