![]() ![]() |
![]() |
![]() Intel and compatable CPU's Programming Information ![]() |
|
Intel SSE MMX2 KNI documentation AMD 64 Bit & Opteron resource on this site Intel Itanium 64 Bit processor Intel 80386 Reference Programmer's Manual Our Partners: |
![]() |
prev: 3.10 Segment Register Instructions next: Chapter 4 -- Systems Architecture
3.11 Miscellaneous InstructionsThe following instructions do not fit in any of the previous categories, but are nonetheless useful.3.11.1 Address Calculation InstructionLEA (Load Effective Address) transfers the offset of the source operand (rather than its value) to the destination operand. The source operand must be a memory operand, and the destination operand must be a general register. This instruction is especially useful for initializing registers before the execution of the string primitives (ESI, EDI) or the XLAT instruction (EBX). The LEA can perform any indexing or scaling that may be needed. Example:LEA EBX, EBCDIC_TABLECauses the processor to place the address of the starting location of the table labeled EBCDIC_TABLE into EBX. 3.11.2 No-Operation InstructionNOP (No Operation) occupies a byte of storage but affects nothing but the instruction pointer, EIP.
3.11.3 Translate InstructionXLAT (Translate) i replaced a byte in the AL register with a byte from a user-coded translation table. When XLAT is executed, AL should have the unsigned index to the table addressed by EBX. XLAT changes the contents of AL from table index to table entry. EBX is unchanged. The XLAT instruction is useful for translating from one coding system to another such as from ASCII to EBCDIC. The translate table may be up to 256 bytes long. The value placed in the AL register serves as an index to the location of the corresponding translation value.
up:
Chapter 3 -- Applications Instruction Set |