Intel SSE MMX2 KNI documentation
AMD 64 Bit & Opteron resource on this site
Intel Itanium 64 Bit processor
CPU Heat Dissipation Table
Intel 80386 Reference Programmer's Manual
Our Partners:
|
|
up:
Chapter 9 -- Exceptions and Interrupts
prev: Chapter 9 -- Exceptions and Interrupts
next: 9.2 Enabling and Disabling Interrupts
9.1 Identifying Interrupts
The processor associates an identifying number with each different type of
interrupt or exception.
The NMI and the exceptions recognized by the processor are assigned
predetermined identifiers in the range 0 through 31. Not all of these
numbers are currently used by the 80386; unassigned identifiers in this
range are reserved by Intel for possible future expansion.
The identifiers of the maskable interrupts are determined by external
interrupt controllers (such as Intel's 8259A Programmable Interrupt
Controller) and communicated to the processor during the processor's
interrupt-acknowledge sequence. The numbers assigned by an 8259A PIC can be
specified by software. Any numbers in the range 32 through 255 can be used.
Table 9-1 shows the assignment of interrupt and exception identifiers.
Exceptions are classified as faults, traps, or aborts depending on the way
they are reported and whether restart of the instruction that caused the
exception is supported.
-
Faults
-
Faults are exceptions that are reported "before" the
instruction causingthe exception. Faults are either detected before
the instruction begins to execute, or during execution of the
instruction. If detected during the instruction, the fault is
reported with the machine restored to a state that permits the
instruction to be restarted.
-
Traps
-
A trap is an exception that is reported at the instruction
boundary immediately after the instruction in which the
exception was detected.
-
Aborts
-
An abort is an exception that permits neither precise location
of the instruction causing the exception nor restart of the program
that caused the exception. Aborts are used to report severe errors,
such as hardware errors and inconsistent or illegal values in system
tables.
Table 9-1. Interrupt and Exception ID Assignments
Identifier Description
0 Divide error
1 Debug exceptions
2 Nonmaskable interrupt
3 Breakpoint (one-byte INT 3 instruction)
4 Overflow (INTO instruction)
5 Bounds check (BOUND instruction)
6 Invalid opcode
7 Coprocessor not available
8 Double fault
9 (reserved)
10 Invalid TSS
11 Segment not present
12 Stack exception
13 General protection
14 Page fault
15 (reserved)
16 Coprecessor error
17-31 (reserved)
32-255 Available for external interrupts via INTR pin
up:
Chapter 9 -- Exceptions and Interrupts
prev: Chapter 9 -- Exceptions and Interrupts
next: 9.2 Enabling and Disabling Interrupts
|